Wirebonding has been a mainstream process for fabrication of electronic packages and assemblies since the 1950s. Wirebonding provides electrical connection of microelectronic components in an electronic device via very fine bonding wires, which are usually 1 to 3 mils in diameter and made of gold (Au), aluminum (Al) or copper (Cu). The methods presently used in wirebonding include, for example, thermocompression, ultrasonic method and thermosonic method. Publications with respect to wirebonding include, for example, U.S. Pat. No. 6,858,474. It has been found that wirebonding has the following common failings:                Cratering or peeling of a wirebond pad        Wirebond fracture (which leads to weak bonds or bond lifts)        Inconsistent tails (which cause shorts with other bonds or traces on the surrounding circuitry)        Poor welding (which leads to weak bonds)        Improper positioning on the bond pad (which leads to shorts and bad welds)        
Besides, conventional wirebonding package is single-side cooled and normally requires heat sinking, which needs extra substrate space.
Over the past five decades, the growth of the semiconductor 30 industry has been truly remarkable, paced to a large extent by equally remarkable progress in the integration, sub-miniaturization and heat dissipation of integrated circuits (ICs). Wirebonding no longer satisfies the needs of modern electronic packages and assemblies.
Accordingly, flip-chip packaging has been developed as a replacement. Flip-chip packaging provides many advantages, for example, good conductivity, good heat dissipation and minimized chip size. In addition, flip-chip packaging offers benefits over standard wirebonding. For example, flip-chip packaging enables the creation of high-pinout and high-speed designs that are not achievable in standard wirebonding. Moreover, flip-chip packaging reduces the transmitting distance of electronic signals between components and a substrate. Nowadays, flip-chip packaging is widely used in fabrication of electronic packages and assemblies.
It is commonly known to form a conformal coating to protect IC packages from environmental and mechanical damages. A conformal coating keeps the components contained in IC packages away from moisture, solvent abrasion and so on, and thus prolongs the life of the components. Conformal coatings are usually applied by dipping, spraying or simple flow coating. However, the coatings formed on undesired portions of the IC packages cannot be easily removed unless by applying mechanical force, for example, by scarping.
There is still a need for a method for encapsulating a substrate in which the resist layer in undesired regions of a substrate can be easily removed.
In another aspect, light emitting diode (LED) is a semiconductor component that has been broadly used as a light emission device. One prior art device employs multiple LEDs in a single housing to produce a proper light output. The drawback of this type of LED is that the light output is insufficient. To address this drawback, it has been suggested that a single LED be used as a replacement of multiple LEDs. For example, US 2007/00064420 A1 discloses an enhanced light output LED device, which comprises multiple LEDs, each with its own dome (lens). However, such type of LED requires a higher current while the light output is not optimized for power consumption.
LEDs, which emit white light, are desirable. To create white light, it is known to fabricate a light emitting package that contains a plurality of LED chips with evenly mixed colorful lights, for example, red, green and blue lights. It is also known to employ a conformal coating technique in fabrication of LEDs. For example, US 2007/0045761 A1 discloses a method for producing a white light LED which comprises providing an LED die that emits a light having a blue or shorter wavelength, conformably coating the LED die on a plurality of surfaces with a first phosphor for converting the LED light to a first color component of white light, and substantially encapsulating the LED die having the conformal coating with a second phosphor in a transport binder. In US 2007/0045761 A1, a photoresist is deposited over the surface of a support substrate and removed from the surfaces of the LED dice where phosphor is to be deposited. The LED dice is then immersed in a solution containing charged phosphor particles for conformably coating the surfaces of the LEDs with the phosphor. The disadvantage of the method of US 2007/0045761 A1 is that it is only suitable for very thin conformal phosphor layer coating and the silicon encapsulant materials is only UV sensitive types.
In addition to a conformal coating technique, a screen-printing technique is commonly employed in the fabrication of LEDs to provide a conformal coating on each LED. For example, U.S. Pat. No. 5,478,699 teaches a method for fabricating an electrical substrate in which a screen-printing stencil is used. However, the screen-printing technique requires precise alignment and thus increases the difficulty of processing. Moreover, stencils used in the screen-printing technique tend to expand when heated and to shrink when cooled.
It is desirable that LEDs can perform optimized light output and be manufactured without the problem associated with alignment. It is also desirable that the cost of production can be reduced.